深圳市勤思达科技有限公司

74HC174N;

74HCT174N

DIP16 plastic dual in-line package; 16 leads (300 mil); long body SOT38-1

74HC174D;

74HCT174D

SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1

74HC174DB;

74HCT174DB

SSOP16 plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1

74HC174PW;

74HCT174PW

TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1

FEATURES

• Six edge-triggered D-type flip-flops

• Asynchronous master reset

• Output capability: standard

• ICC category: MSI

GENERAL DESCRIPTION

The 74HC/HCT174 are high-speed Si-gate CMOS devices

and are pin compatible with low power Schottky TTL

(LSTTL). They are specified in compliance with JEDEC

standard no. 7A.

The 74HC/HCT174 have six edge-triggered D-type

flip-flops with individual D inputs and Q outputs. The

common clock (CP) and master reset (MR) inputs load and

reset (clear) all flip-flops simultaneously.

The register is fully edge-triggered. The state of each D

input, one set-up time prior to the LOW-to-HIGH clock

transition, is transferred to the corresponding output of the

flip-flop.

A LOW level on the MR input forces all outputs LOW,

independently of clock or data inputs.

The device is useful for applications requiring true outputs

only and clock and master reset inputs that are common to

all storage elements.