- 非IC关键词
深圳市勤思达科技有限公司
- 卖家积分:
营业执照:已审核经营模式:贸易/代理/分销所在地区:广东 深圳企业网站:
http://qsd.dzsc.com
收藏本公司 人气:1207897
企业档案
- 相关证件:
 
- 会员类型:
- 会员年限:14年
- 阿库IM:
- 地址:深圳市福田区华强北赛格科技园四栋中12楼A4座—2L
- 传真:0755-83955172
- E-mail:1282971461@qq.com
相关产品
产品信息
Features
Multi-bit Delta-Sigma Modulator
24-bit Conversion
Automatically Detects Sample Rates up to
192 kHz.
105 dB Dynamic Range
-90 dB THD+N
Low Clock-Jitter Sensitivity
Single +3.3 or +5 V Power Supply
Filtered Line-Level Outputs
On-chip Digital De-emphasis
Popguard® Technology
Small 10-pin TSSOP Package
The CS4344 family members (CS4344, CS4345, and
CS4348) are complete, stereo digital-to-analog output
systems including interpolation, multibit D/A conversion
and output analog filtering in a 10-pin package. The
CS4344 family supports major audio data interface formats.
Individual devices differ only in the supported
interface format.
The CS4344 family is based on a fourth-order multibit
delta-sigma modulator with a linear analog low-pass filter.
This family also includes autospeed mode detection
using both sample rate and master clock ratio as a
method of auto-selecting sampling rates between 2 kHz
and 200 kHz.
The CS4344 family contains on-chip digital deemphasis,
operates from a single +3.3 V or +5 V power supply,
and requires minimal support circuitry. These features
are ideal for DVD players & recorders, digital televisions,
home theater and set top box products, and
automotive audio systems.
The CS4344 family is available in a 10-pin TSSOP
package in both Commercial (-10 to +85 °C) and Automotive
grades (-40 to +85 °C). See Section 8. “Ordering
Information” on page 23 for complete details.

11. Not all sample rates are supported for all clock ratios. See Table 1, “Common Clock Frequencies,” on
page 12 for supported ratio’s and frequencies.
12. In Internal SCLK Mode, the Duty Cycle must be 50% 1/2 MCLK Period.