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MC74HC04A

High–Performance Silicon–Gate CMOS

The MC74HC04A is identical in pinout to the LS04 and the

MC14069. The device inputs are compatible with Standard CMOS

outputs; with pullup resistors, they are compatible with LSTTL

outputs.

The device consists of six three–stage inverters.

• Output Drive Capability: 10 LSTTL Loads

• Outputs Directly Interface to CMOS, NMOS and TTL

• Operating Voltage Range: 2 to 6V

• Low Input Current: 1μA

• High Noise Immunity Characteristic of CMOS Devices

• In Compliance With the JEDEC Standard No. 7A Requirements

• Chip Complexity: 36 FETs or 9 Equivalent Gates

MC74HC04A

Functional operation should be restricted to the Recommended Operating Conditions.

†Derating — Plastic DIP: – 10 mW/
C from 65
to 125
C

SOIC Package: – 7 mW/
C from 65
to 125
C

TSSOP Package: – 6.1 mW/
C from 65
to 125
C

For high frequency or heavy load considerations, see Chapter 2 of the ON Semiconductor High–Speed CMOS Data Book (DL129/D)

This device contains protection

circuitry to guard against damage

due to high static voltages or electric

fields. However, precautions must

be taken to avoid applications of any

voltage higher than maximum rated

voltages to this high–impedance circuit.

For proper operation, Vin and

Vout should be constrained to the

range GND
(Vin or Vout)
VCC.

Unused inputs must always be

tied to an appropriate logic voltage

level (e.g., either GND or VCC).

Unused outputs must be left open.